| Title |
A Study on the Design of Concurrent Dual Band Low Noise Amplifier for Dual Band RFID Reader |
| Authors |
오재욱(Oh, Jae-Wook) ; 임태서(Lim, Tae-Seo) ; 김형석(Kim, Hyeong-Seok) |
| Keywords |
이중 대역 저잡음 증폭기 ; 잡음 지수 ; 본딩 와이어 인덕터 RFID |
| Abstract |
In this paper, we deal wih a concurrent dual band low noise amplifier for a Radio Frequency Identification(RFID) reader operating at 912MHz and 2.45GHz. The design of the low noise amplifier is based on the TSMC 0.18μm CMOS technology. The chip size is 1.8mm×1.8mm. To improve the noise figure of the circuit, SMD components and a bonding wire inductor are applied to input matching. Simulation results show that the 521 parameter is 11.41dB and 9.98dB at 912MHz and 2.45GHz, respectively The noise figure is also determined to 1.25dB and 3.08dB at the same frequencies with a power consumption of 8.95mW. |