| Title |
Implementation of the Multi-Channel Network Controller using Buffer Sharing Mechanism |
| Authors |
이태수(Lee, Tae-Su) ; 박재현(Park, Jae-Hyun) |
| Keywords |
통신버퍼 공유 FPGA ; SOPC ; ARINC-429 |
| Abstract |
This paper presents an implementation of a new type of architecture to improve an overflow problem on the network buffer. Each receiver channel of network system stores the message in its own buffer. If some receiver channel receives many messages, buffer overflow problem may occur for the channel. This paper proposes a network controller that implements a receiver channel with shared-memory to save all of the received messages from the every incomming channels. The proposed architecture is applied to ARINC-429, a real-time control network for commercial avionics system. For verifying performance of the architecture, ARINC-429 controller is designed using a SOPC platform, designed by Verilog and targeted to Xilinx Virtex-4 with a built-in PPC405 core. |