| Title |
A Design of 8-bit Switched-Capacitor Cyclic DAC with Mismatch Compensation of Capacitors |
| Authors |
양상혁(Yang, Sang-Hyeok) ; 송지섭(Song, Ji-Seop) ; 김석기(Kim, Su-Ki) ; 이계신(Lee, Kye-Shin) ; 이용민(Lee, Yong-Min) |
| DOI |
https://doi.org/10.5370/KIEE.2011.60.2.315 |
| Keywords |
Display driver ; Cyclic DAC ; Switched-capacitor ; Capacitor mismatch compensation ; Charge compensation |
| Abstract |
A switched-capacitor cyclic DAC scheme with mismatch compensation of capacitors is designed. In cyclic DAC, a little error between two capacitors is accumulated every cycle. As a result, the accumulated error influences the final analog output which is wrong data. Therefore, a mismatch compensation technique was proposed and the error can be effectively reduced, which alleviates the matching requirement. In order to verify the operation of the proposed DAC, an 8-bit switched-capacitor cyclic DAC is designed through HSPICE simulation and implemented through magna 0.18um standard CMOS process. |