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The Transactions of
the Korean Institute of Electrical Engineers
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ISSN : 1975-8359 (Print)
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The Transactions of the Korean Institute of Electrical Engineers
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Trans. Korean. Inst. Elect. Eng.
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2019-02
(Vol.68 No.02)
10.5370/KIEE.2019.68.2.364
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REF
References
1
Online article , 2016, HEAT(Hardware Enabled Algorithmic Tester) for 2.5D HBM Solution
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IT & T , Model: T5588, http://www.it-t.co.kr/
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Seo S., Cho G., Lee Y., Choi I., Kang S., 2017, Test parallelism improvement and pin reduction method for next generation memory testing using instruction- based BOST, Proc. of Korea Test Conf.(KTC)
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Seo S., Lim H., Kang S., Kang S., 2017, Off-Chip Test Architecture for Improving Multi-Site Testing Efficiency using Tri-State Decoder and 3V-Level Encoder, Proc. of Intl. Symp. on Quality Elec. Design(ISQED)
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Chen J. Z., Lee K. J., 2017, Test Stimulus Compression Based on Broadcast Scan With One Single Input, IEEE Trans. on Computer-Aided Design Of Integr. Cir. and Syst., Vol. 36, No. 1, pp. 184-197
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Kim H., Lee Y., Kang S., 2015, A Novel Massively Parallel Testing Method Using Multi-Root for High Reliability, IEEE Trans. on RELIABILITY, Vol. 64, No. 1, pp. 486-496
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IEEE Std 1149.1-2013, https://standards.ieee.org
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Simple Parameterizable Network-on-Chip, https://github.com/gtarawneh/simpnoc
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Jun H., Nam S., Jin H., Lee J. C., Park Y. J., Lee J. J., 2017, High-Bandwidth Memory(HBM) Test Challenges and Solutions, IEEE Design & Test, Vol. 34, No. 1, pp. 16-25